SiFive unveils XM Sequence for AI workloads with scalable matrix engine

SiFive has introduced the SiFive Intelligence XM Sequence designed for accelerating excessive efficiency AI workloads. That is the primary IP from SiFive to incorporate a extremely scalable AI matrix engine, which accelerates time to marketplace for semiconductor corporations constructing system on chip options for edge IoT, shopper gadgets, subsequent era electrical and/or autonomous automobiles, knowledge centres and past.

As a part of SiFive’s dedication to supporting its clients and the broader RISC-V ecosystem, SiFive has additionally introduced its intention to open supply a reference implementation of its SiFive Kernel Library (SKL).

The announcement was made at a SiFive press occasion on Tuesday, Sept. 17 in Santa Clara, the place executives mentioned the management function the RISC-V structure is taking part in on the core of AI options throughout a various vary of market leaders, and supplied an replace on SiFive’s technique, roadmap and enterprise momentum.

SiFive’s new XM Sequence gives an especially scalable and environment friendly AI compute engine. By integrating scalar, vector and matrix engines, XM Sequence clients can reap the benefits of very environment friendly reminiscence bandwidth. The XM Sequence additionally continues SiFive’s legacy of providing extraordinarily excessive efficiency per watt for compute-intensive functions.

“Many corporations are seeing the advantages of an open processor normal whereas they race to maintain up with the speedy tempo of change with AI. AI performs to SiFive’s strengths with efficiency per watt and our distinctive means to assist clients customise their options,” mentioned Patrick Little, the CEO of SiFive. “We’re already supplying our RISC-V options to 5 of the ‘Magnificent 7’ corporations, and as corporations pivot to a ‘software program first’ design technique we’re engaged on new AI options with all kinds of corporations from automotive to datacentre and the clever edge and IoT.”

“RISC-V was initially developed to effectively help specialised computing engines together with mixed-precision operations,” mentioned Krste Asanovic, SiFive founder and chief architect. “This, coupled with the inclusion of environment friendly vector directions and the help of specialized AI extensions, are the the reason why most of the largest datacenter corporations have already adopted RISC-V AI accelerators.”

As a part of his presentation, Krste launched extra particulars on the brand new XM Sequence which broadens its Intelligence Product household. The XM Sequence additionally continues SiFive’s legacy of providing excessive efficiency per watt for compute-intensive functions. That includes 4 X-Cores per cluster, a cluster can ship 16 TOPS (INT8) or 8 TFLOPS (BF16) per GHz. There’s 1TB/s of sustained reminiscence bandwidth per XM Sequence cluster, with the clusters having the ability to entry reminiscence through a excessive bandwidth port or through a CHI port for coherent reminiscence entry. SiFive envisions the creation of techniques incorporating no host CPU or ones primarily based on RISC-V, x86 or Arm.

These occupied with studying methods to entry the open supply SKL or study extra in regards to the XM household or different AI options from SiFive can contact at [email protected]. SiFive will probably be on the RISC-V Summit North America, going down Oct. 22-23, 2024 in Santa Clara, Calif. To schedule an on-site assembly, please contact your gross sales consultant or contact gross sales: https://www.sifive.com/contact.

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